Modern integrated circuits are made up of literally millions of active devices such as transistors and capacitors. These devices are initially isolated from one another but are later interconnected together to form functional circuits. Typical interconnection structures include lateral interconnections, such as metal lines (wirings), and vertical interconnections, such as vias and contacts. The quality of the interconnection structure drastically affects the performance and reliability of the fabricated circuit. Interconnections are increasingly determining the limits of performance and density of modern integrated circuits.
FIG. 1 is a cross-sectional illustration of a conventional vertical interconnection structure used in the semiconductor industry. Metal lines 104 and 106, which are typically formed of copper, aluminum or alloys thereof, are used to couple active devices (not shown) into functional circuits. A dielectric layer 108 electrically isolates the metal layers in which metal lines 104 and 106 are formed. Electrical connections are made between metal lines 104 and 106 through a metal via 112.
The interconnection structure of FIG. 1 experiences several problems. As integrated circuit dimensions decrease, in order to increase circuit density, vias are becoming smaller by the square of the dimension decrease. Such small vias can cause both reliability and performance problems in an integrated circuit. Reliability problems are caused by high concentrations of current or current crowding effects, which in turn causes self-heating effects, and hence electro-migration. As a result, voids, open circuits and other reliability problems such as high RC delay, which is caused by high contact resistance, arise. Similar problems also occur to contacts, contacts being a term typically used to describe a via between a first metal layer and an underlying active or passive component.
Open circuits and high RC delay are typically solved by redundant vias. U.S. Pat. Nos. 6,556,658 and 6,026,224 disclose methods of forming redundant vias in order to improve reliability. With redundant vias, if one of the vias is open or has a high contact resistance, the remaining vias still provide a good contact, and the overall circuit performance is not affected.
Although the addition of the redundant vias reduces the probability of open circuit and/or high RC delay, the distance between the vias decreases. With the scaling of integrated circuits, particularly at 90 nm technology and below, problems such as bird's beak occur. FIG. 2 illustrates a top view of vias having bird's beak effects. Vias 116 and 118 are closely located. Due to optical proximity effects during the exposure of photo resists, via extensions 120 and 122, each having the shape of a bird's beak, are formed. As a result, vias 116 and 118 may short.
Due to the close proximity of the vias and other conductive features in the integrated circuit, it is difficult to move vias away from each other without violating design rules. Therefore, there is a need for a new method of forming vias and photo masks, so that the adverse effects of closely located vias can be avoided.